::PROJECTS::

Following is a list of sample projects which were designed, developed and implemented with full project responsibility at or for A & M Engineering, GT Systems, Intel, NEC Eluminant, SEIKO Communication, Tektronix, ZYGO Industries and others.

FPGA Projects:
· Designed and implemented in an Altera Apex 200 FPGA device a UTOPIA Level 2 interface between PowerPC network processor and a non-standard ATM PON and a 48x512 CAM for a PowerPC Ethernet processor. Quartus software was used for synthesis and place and route. Also, performed modification and upgrade of existing digital and optical communications system designs. 2001

· Designed, simulated, synthesized and implemented in Xilinx VirtexE 300 FPGA using VHD a SONET OC12/DS3 dual channel framer/deframmer and mapper/demapper. Synplicity was used for synthesis and VisualHDL/Aldec tools for simulation. Validated and tested using standard test equipment and OC12/DS3 test sets. 1999-2000

· Verified a VHDL based 50K+ gates, PCI interface ASIC for server performance monitoring by implementing in an Altera 10K100 FPGA. Resulted in first-pass ASIC success and software co-development. Activities included modification of VHDL for FPGA, synthesis using synopsys and synplify, place and route using Maxplus2 and test generation for system level validation. 1996-97

· Designed in an FPGA an EEPROM emulator replacing complete microcontroller and software based system for communication watch test system. Speed increased 200 times. “We hooked it up and it worked first time,” Fax message from project manager. 1996

· Designed in Xilinx FPGA digital sections of a water level controller, torque calculator and display controller for fire fighting helicopters. Critical sections including two 16 bit binary counters worked at 100+ MHz in the FPGA. 1994-95

· In a leading role working closely with software engineers, replaced over 100 discrete logic chips with Xilinx FPGA’s in a handheld computer for vocally disabled. Saved substantial power & space, reduced parts count and increased flexibility for future upgrade. Designed and implemented in an FPGA interfaces for PCMCIA memory card and hard drive (IDE & PCMCIA), enhanced performance and functionality many folds. Extended the memory range of the speech chip from 1 MB to 16 MB by redesigning PCMCIA memory interface in an FPGA providing 50+ times longer speech and further reduced the parts count. Reduced standby power consumption 10+ times using low voltage Xilinx FPGA’s and implementing external power management. Integrated the designs into Xilinx FPGA’s on two boards used on all products simplifying manufacturing and saving cost. 1992-96

Other Projects:
· Designed a PIC microcontroller based LCD display controller for a new oscilloscope probe. Programmed in assembly language and developed a working prototype. 1998

· Designed and developed a working prototype of a microcontroller based timing unit to maintain and display time for five different events. Programmed the unit in assembly language. 1996

· Working as lead achieved first-pass success on life extension of 660 MHz timebase board for high speed test system (HFS) with partial redesign and parts replacements, saved about six weeks of time and reduced the cost substantially. Resolved a major EMI problem on new revision of CPU board for HFS and successfully brought the idle assembly line back to production. Designed and simulated data paths and other subsystems in Verilog for new generation of HFS. 1997-98.